Advanced RF CMOS Design
Icera’s renowned RF engineering team has applied its expertise in digital and analog RF to CMOS design to develop industry-leading radio silicon to increase functionality, while reducing cost, size and power consumption, to deliver the smallest, most cost-effective single-chip transceiver solution available on the market today.
Applying innovative design techniques in a 130nm CMOS process, Icera has successfully implemented robust direct up/down-conversion architectures in its single-chip RF transceivers for mobile multi-band HEDGE applications.
Icera has leveraged its expertise in advanced RF CMOS design to optimize performance and resolve design issues associated with direct-conversion CMOS architectures. The result is a DDC™ (Digital Direct Conversion) receiver and Harmony™, a low-noise direct up-conversion transmitter, both supporting all narrow and wideband modulation types.
Digital Direct Conversion (DDC™)
At the heart of Icera’s DDC™ Receiver is a unique down-conversion process that implements a patented local oscillator (LO) design and programmable DC offset correction circuitry that removes the effects of any interfering signal. Icera’s advanced products take DDC™ one step further by implementing a dual-receive path to support complete multi-band receive diversity resulting in higher data speeds across the cell.
Harmony™-Direct Upconversion Transmitter
The Harmony™ transmitter utilizes careful frequency planning in a linear architecture which in turn achieves excellent system transmit performance for all standards (HSUPA, WCDMA, EDGE, GPRS, GSM) and frequency bands. In addition, Harmony exhibits very low noise, therefore requiring no external 2.75G transmit RF SAW filters.
